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semiconductor technical data high performance current mode controllers pin connections order this document by mc34129/d d suffix plastic package case 751a (so14) p suffix plastic package case 646 14 1 14 1 (top view) drive output drive ground ramp input sync/inhibit input r t /c t v ref 2.5 v gnd 1 2 3 4 5 6 78 9 10 11 12 13 14 v cc start/run output c softstart feedback/ pwm input error amp inverting input error amp noninverting input v ref 1.25 v device operating temperature range package ordering information mc34129d mc34129p t a = 0 to +70 c so14 plastic dip mc33129d MC33129P so14 plastic dip t a = 40 to +85 c 1 motorola analog ic device data
the mc34129/mc33129 are high performance current mode switching regulators specifically designed for use in low power digital telephone applications. these integrated circuits feature a unique internal fault timer that provides automatic restart for overload recovery. for enhanced system efficiency, a start/run comparator is included to implement bootstrapped operation of v cc . other functions contained are a temperature compensated reference, reference amplifier, fully accessible error amplifier, sawtooth oscillator with sync input, pulse width modulator comparator, and a high current totem pole driver ideally suited for driving a power mosfet. also included are protective features consisting of softstart, undervoltage lockout, cyclebycycle current limiting, adjustable deadtime, and a latch for single pulse metering. although these devices are primarily intended for use in digital telephone systems, they can be used cost effectively in many other applications. ? current mode operation to 300 khz ? automatic feed forward compensation ? latching pwm for cyclebycycle current limiting ? continuous retry after fault timeout ? softstart with maximum peak switch current clamp ? internally trimmed 2% bandgap reference ? high current totem pole driver ? input undervoltage lockout ? low startup and operating current ? direct interface with motorola sensefet products simplified block diagram + softstart and fault timer start/run undervoltage lockout 1.25v reference error amp latching pwm x2 oscillator 12 7 6 5 4 c softstart gnd v ref 2.5v r t /c t sync/inhibit input 13 14 8 9 10 11 1 2 3 start/run output v cc v ref 1.25v noninverting input inverting input feedback/ pwm input drive out drive gnd ramp input ? motorola, inc. 1996 rev 1
mc34129 mc33129 2 motorola analog ic device data maximum ratings rating symbol value unit v cc zener current i z(vcc) 50 ma start/run output zener current i z(start/run) 50 ma analog inputs (pins 3, 5, 9, 10, 11, 12) 0.3 to 5.5 v sync input voltage v sync 0.3 to v cc v drive output current, source or sink i drv 1.0 a current, reference outputs (pins 6, 8) i ref 20 ma power dissipation and thermal characteristics d suffix, plastic package case 751a maximum power dissipation @ t a = 70 c thermal resistance, junctiontoair p suffix, plastic package case 646 maximum power dissipation @ t a = 70 c thermal resistance, junctiontoair p d r q ja p d r q ja 552 145 800 100 mw c/w mw c/w operating junction temperature t j +150 c operating ambient temperature mc34129 mc33129 t a 0 to +70 40 to +85 c storage temperature range t stg 65 to +150 c electrical characteristics (v cc = 10 v, t a = 25 c [note 1], unless otherwise noted.) characteristics symbol min typ max unit reference sections reference output voltage, t a = 25 c 1.25 v ref., i l = 0 ma 2.50 v ref., i l = 1.0 ma v ref 1.225 2.375 1.250 2.500 1.275 2.625 v reference output voltage, t a = t low to t high 1.25 v ref., i l = 0 ma 2.50 v ref., i l = 1.0 ma v ref 1.200 2.250 1.300 2.750 v line regulation (v cc = 4.0 v to 12 v) 1.25 v ref., i l = 0 ma 2.50 v ref., i l = 1.0 ma reg line 2.0 10 12 50 mv load regulation 1.25 v ref., i l = 10 m a to +500 m a 2.50 v ref., i l = 0.1 ma to +1.0 ma reg load 1.0 3.0 12 25 mv error amplifier input offset voltage (v in = 1.25 v) t a = 25 c t a = t low to t high v io 1.5 10 mv input offset current (v in = 1.25 v) i io 10 na input bias current (v in = 1.25 v) t a = 25 c t a = t low to t high i ib 25 200 na input common mode voltage range v icr 0.5 to 5.5 v open loop voltage gain (v o = 1.25 v) a vol 65 87 db gain bandwidth product (v o = 1.25 v, f = 100 khz) gbw 500 750 khz power supply rejection ratio (v cc = 5.0 v to 10 v) psrr 65 85 db output source current (v o = 1.5 v) i source 40 80 m a output voltage swing high state (i source = 0 m a) low state (i sink = 500 m a) v oh v ol 1.75 1.96 0.1 2.25 0.15 v note: 1. t low =0 c for mc34129 t high = +70 c for mc34129 40 c for mc33129 +85 c for mc33129
mc34129 mc33129 3 motorola analog ic device data electrical characteristics (v cc = 10 v, t a = 25 c [note 1], unless otherwise noted.) characteristics symbol min typ max unit pwm comparator input offset voltage (v in = 1.25 v) v io 150 275 400 mv input bias current i ib 120 250 m a propagation delay, ramp input to drive output t plh(in/drv) 250 ns softstart capacitor charge current (pin 12 = 0 v) i chg 0.75 1.2 1.50 m a buffer input offset voltage (v in = 1.25 v) v io 15 40 mv buffer output voltage (i sink = 100 m a) v ol 0.15 0.225 v fault timer restart delay time t dly 200 400 600 m s start/run comparator threshold voltage (pin 12) v th 2.0 v threshold hysteresis voltage (pin 12) v h 350 mv output voltage (i sink = 500 m a) v ol 9.0 10 10.3 v output offstate leakage current (v oh = 15 v) i s/r(leak) 0.4 2.0 m a output zener voltage (i z = 10 ma) v z (v cc + 7.6) v oscillator frequency (r t = 25.5 k w , c t = 390 pf) f osc 80 100 120 khz capacitor c t discharge current (pin 5 = 1.2 v) i dischg 240 350 460 m a sync input current high state (v in = 2.0 v) low state (v in = 0.8 v) i ih i il 40 15 125 35 m a sync input resistance r in 12.5 32 50 k w drive output output voltage high state (i source = 200 ma) low state (i source = 200 ma) v oh v ol 8.3 8.9 1.4 1.8 v low state holding current i h 225 m a output voltage rise time (c l = 500 pf) t r 390 ns output voltage fall time (c l = 500 pf) t f 30 ns output pulldown resistance r pd 100 225 350 k w undervoltage lockout startup threshold v th 3.0 3.6 4.2 v hysteresis v h 5.0 10 15 % total device power supply current r t = 25.5 k w , c t = 390 pf, c l = 500 pf i cc 1.0 2.5 4.0 ma power supply zener voltage (i z = 10 ma) v z 12 14.3 v note: 1. t low =0 c for mc34129 t high = +70 c for mc34129 40 c for mc33129 +85 c for mc33129
mc34129 mc33129 4 motorola analog ic device data figure 1. timing resistor versus oscillator frequency figure 2. output deadtime versus oscillator frequency figure 3. oscillator frequency change versus temperature figure 4. error amp open loop gain and phase versus frequency figure 5. error amp smallsignal transient response figure 6. error amp largesignal transient response 0.5 m s/div 20 mv/div 200 mv/div 1.0 m s/div t a = 25 c f osc , oscillator frequency (khz) r t , timing resistor ( ) w c t = 5.0 nf 2.0 nf 1.0 nf 500 pf 200 pf 100pf d f osc , oscillator frequency change (%) t a , ambient temperature ( c) v cc = 10 v r t = 25.5 k c t = 390 pf f osc , oscillator frequency (khz) %dt, percent output deadtime c t = 5.0 nf 2.0 nf 1.0 nf 200 pf 100 pf f, frequency (hz) a vol , open loop voltage gain (db) 0 45 90 135 180 , excess phase (degrees) f gain phase t a = 25 c 5.0 10 20 50 100 200 500 55 25 0 25 50 75 100 125 5.0 10 20 50 100 200 500 1.0 k 10 k 100 k 1.0 m 10 m 1.05 v 1.0 v 0.95 v 1.5 v 1.0 v 0.5 v 1.0 m 500 k 200 k 100 k 50 k 20 k 10 k 8.0 4.0 0 4.0 8.0 100 50 20 5.0 2.0 1.0 60 40 20 0 20 v cc = 10 v t a = 25 c v cc = 10 v t a = 25 c 500 pf v cc = 10 v v o = 1.25 v r l = t a = 25 c
mc34129 mc33129 5 motorola analog ic device data figure 7. error amp open loop dc gain versus load resistance figure 8. error amp output saturation versus sink current figure 9. softstart buffer output saturation versus sink current figure 10. reference output voltage versus supply voltage figure 11. 1.25 v reference output voltage change versus source current figure 12. 2.5 v reference output voltage change versus source current r l , output load resistance (k w ) a vol , open loop voltage gain (db) v cc = 10 v v o = 1.25 v r l to 1.25 v ref t a = 25 c i sink , output sink current (ma) v sat , output saturation voltage (v) v cc = 10 v pins 8 to 9, 6 to 10 pins 2, 5, 7 to gnd t a = 25 c v sat , output saturation voltage (v) i sink , output sink current ( m a) v cc , supply voltage (v) v ref , reference output voltage (v) t a = 25 c v ref 2.5 v, r l = 2.5 k i ref , reference output source current (ma) d v ref , reference output voltage change (mv) t a = 40 c v cc = 10 v +85 c +25 c i ref , reference output source current (ma) d v ref , reference output voltage change (mv) t a = 40 c v cc = 10 v 85 c 25 c 90 80 70 60 50 1.0 0.8 0.6 0.4 0.2 0 1.0 0.8 0.6 0.4 0.2 0 3.2 2.4 1.6 0.8 0 0 4.0 8.0 12 16 20 24 0 4.0 8.0 12 16 20 24 0 20 40 60 80 100 0 2.0 4.0 6.0 8.0 0 100 200 300 400 500 0 4.0 8.0 12 16 0 2.0 4.0 6.0 8.0 10 0 0.4 0.8 1.2 1.6 2.0 v cc = 10 v pins 8 to 9 pins 2, 5, 7, 10, 12 to gnd t a = 25 c v ref 1.25 v, r l =
mc34129 mc33129 6 motorola analog ic device data figure 13. 1.25 v reference output voltage versus temperature figure 14. 2.5 v reference output voltage versus temperature figure 15. drive output saturation versus load current figure 16. drive output waveform figure 17. supply current versus supply voltage 1.0 m s/div 2.0 v/div t a , ambient temperature ( c) d v ref , reference output voltage change (mv) v cc = 10 v r l = *v ref at t a = 25 c *v ref = 1.225 v *v ref = 1.250 v *v ref = 1.275 v t a , ambient temperature ( c) d v ref , reference output voltage change (mv) v cc = 10 v r l = 2.5 k *v ref at t a = 25 c *v ref = 2.375 v *v ref = 2.500 v *v ref = 2.625 v v sat , output saturation voltage (v) i o , output load current (ma) v cc v cc = 10 v t a = 25 c source saturation (load to ground) sink saturation (load to v cc ) gnd i cc , supply current (ma) v cc , supply voltage (v) c l = 500 pf c l = 15 pf 10 0 0 2.0 4.0 6.0 8.0 10 0 4.0 8.0 12 16 20 0 1.0 2.0 3.0 3.0 2.0 1.0 0 10 8.0 6.0 4.0 2.0 0 55 25 0 25 50 75 100 125 55 25 0 25 50 75 100 125 0 200 400 600 800 0 4.0 8.0 12 16 r t = 25.5 k c t = 390 pf t a = 25 c r l = c l = 500 pf t a = 25 c
mc34129 mc33129 7 motorola analog ic device data pin function description pin function description 1 drive output this output directly drives the gate of a power mosfet. peak currents up to 1.0 a are sourced and sinked by this pin. 2 drive ground this pin is a separate power ground return that is connected back to the power source. it is used to reduce the effects of switching transient noise on the control circuitry. 3 ramp input a voltage proportional to the inductor current is connected to this input. the pwm uses this information to terminate output switch conduction. 4 sync/inhibit input a rectangular waveform applied to this input will synchronize the oscillator and limit the maximum drive output duty cycle. a dc voltage within the range of 2.0 v to v cc will inhibit the controller. 5 r t /c t the freerunning oscillator frequency and maximum drive output duty cycle are programmed by connecting resistor r t to v ref 2.5 v and capacitor c t to ground. operation to 300 khz is possible. 6 v ref 2.50 v this output is derived from v ref 1.25 v. it provides charging current for capacitor c t through resistor r t . 7 ground this pin is the control circuitry ground return and is connected back to the source ground. 8 v ref 1.25 v this output furnishes a voltage reference for the error amplifier noninverting input. 9 error amp noninverting input this is the noninverting input of the error amplifier. it is normally connected to the 1.25 v reference. 10 error amp inverting input this is the inverting input of the error amplifier. it is normally connected to the switching power supply output through a resistor divider. 11 feedback/pwm input this pin is available for loop compensation. it is connected to the error amplifier and softstart buffer outputs, and the pulse width modulator input. 12 c softstart a capacitor c softstart is connected from this pin to ground for a controlled rampup of peak inductor current during startup. 13 start/run output this output controls the state of an external bootstrap transistor. during the start mode, operating bias is supplied by the transistor from v in . in the run mode, the transistor is switched off and bias is supplied by an auxiliary power transformer winding. 14 v cc this pin is the positive supply of the control ic. the controller is functional over a minimum v cc range of 4.2 v to 12 v.
mc34129 mc33129 8 motorola analog ic device data operating description the mc34129 series are high performance current mode switching regulator controllers specifically designed for use in low power telecommunication applications. implementation will allow remote digital telephones and terminals to shed their power cords and derive operating power directly from the twisted pair used for data transmission. although these devices are primarily intended for use in digital telephone systems, they can be used cost effectively in a wide range of converter applications. a representative block diagram is shown in figure 18. oscillator the oscillator frequency is programmed by the values selected for the timing components r t and c t . capacitor c t is charged from the 2.5 v reference through resistor r t to approximately 1.25 v and discharged by an internal current sink to ground. during the discharge of c t , the oscillator generates an internal blanking pulse that holds the lower input of the nor gate high. this causes the drive output to be in a low state, thus producing a controlled amount of output deadtime. figure 1 shows oscillator frequency versus r t and figure 2 output deadtime versus frequency, both for given values of c t . note that many values of r t and c t will give the same oscillator frequency but only one combination will yield a specific output deadtime at a give frequency. in many noise sensitive applications it may be desirable to frequencylock one or more switching regulators to an external system clock. this can be accomplished by applying the clock signal to the synch/inhibit input. for reliable locking, the freerunning oscillator frequency should be about 10% less than the clock frequency. referring to the timing diagram shown figure 19, the rising edge of the clock signal applied to the sync/inhibit input, terminates charging of c t and drive output conduction. by tailoring the clock waveform, accurate duty cycle clamping of the drive output can be achieved. a circuit method is shown in figure 20. the sync/inhibit input may also be used as a means for system shutdown by applying a dc voltage that is within the range of 2.0 v to v cc . pwm comparator and latch the mc34129 operates as a current mode controller whereby output switch conduction is initiated by the oscillator and terminated when the peak inductor current reaches a threshold level established by the output of the error amp or softstart buffer (pin 11). thus the error signal controls the peak inductor current on a cyclebycycle basis. the pwm comparatorlatch configuration used, ensures that only a single pulse appears at the drive output during any given oscillator cycle. the inductor current is converted to a voltage by inserting the groundreferenced resistor r s in series with the source of output switch q 1 . the ramp input adds an offset of 275 mv to this voltage to guarantee that no pulses appear at the drive output when pin 11 is at its lowest state. this occurs at the beginning of the softstart interval or when the power supply is operating and the load is removed. the peak inductor current under normal operating conditions is controlled by the voltage at pin 11 where: i pk = v (pin 11) 0.275 v r s abnormal operating conditions occur when the power supply output is overloaded or if output voltage sensing is lost. under these conditions, the voltage at pin 11 will be internally clamped to 1.95 v by the output of the softstart buffer. therefore the maximum peak switch current is: i pk(max) = 1.95 v 0.275 r s r s 1.675 v = when designing a high power switching regulator it becomes desirable to reduce the internal clamp voltage in order to keep the power dissipation of r s to a reasonable level. a simple method which adjusts this voltage in discrete increments is shown in figure 22. this method is possible because the ramp input bias current is always negative (typically 120 m a). a positive temperature coefficient equal to that of the diode string will be exhibited by i pk(max) . an adjustable method that is more precise and temperature stable is shown in figure 23. erratic operation due to noise pickup can result if there is an excessive reduction of the clamp voltage. in this situation, high frequency circuit layout techniques are imperative. a narrow spike on the leading edge of the current waveform can usually be observed and may cause the power supply to exhibit an instability when the output is lightly loaded. this spike is due to the power transformer interwinding capacitance and output rectifier recovery time. the addition of an rc filter on the ramp input with a time constant that approximates the spike duration will usually eliminate the instability; refer to figure 25. error amp and softstart buffer a fullycompensated error amplifier with access to both inputs and output is provided for maximum design flexibility. the error amplifier output is common with that of the softstart buffer. these outputs are opencollector (sink only) and are ored together at the inverting input of the pwm comparator. with this configuration, the amplifier that demands lower peak inductor current dominates control of the loop. softstart is mandatory for stable startup when power is provided through a high source impedance such as the long twisted pair used in telecommunications. it effectively removes the load from the output of the switching power supply upon initial startup. the softstart buffer is configured as a unity gain follower with the noninverting input connected to pin 12. an internal 1.0 m a current source charges the softstart capacitor (c softstart ) to an internally clamped level of 1.95 v. the rate of change of peak inductor current, during startup, is programmed by the capacitor value selected. either the fault timer or the undervoltage lockout can discharge the softstart capacitor.
mc34129 mc33129 9 motorola analog ic device data figure 18. representative block diagram figure 19. timing diagram + + + + + + + + + start/run output v in = 20v v cc 1.95v start/run comparator 7.0v 13 12 1.0 m a fault timer undervoltage lockout 14 v cc v cc c softstart pwm comparator v cc 80 m a 3.6v 14.3v 8 1.25v reference 2.5v reference 275mv 9 noninverting input 7 6 1.25v error amp 10 inverting input r softstart buffer v cc 11 feedback/pwm input r t r latch q1 1 drive output 5 oscillator r q s 2 drive gnd c t 4 sync/inhibit input 32k 3 ramp input r s = sink only positive true logic 35k 1.95v 225k sync/inhibit input capacitor c t latch aseto input feedback/pwm input ramp input latch areseto input drive output start/run output 20 v 14.3 v 600 m s delay
mc34129 mc33129 10 motorola analog ic device data fault timer this unique circuit prevents sustained operating in a lockout condition. this can occur with conventional switching control ics when operating from a power source with a high series impedance. if the power required by the load is greater than that available from the source, the input voltage will collapse, causing the lockout condition. the fault timer provides automatic recovery when this condition is detected. under normal operating conditions, the output of the pwm comparator will reset the latch and discharge the internal fault timer capacitor on a cyclebycycle basis. under operating conditions where the required power into the load is greater than that available from the source (v in ), the ramp input voltage (plus offset) will not reach the comparator threshold level (pin 11), and the output of the pwm comparator will remain low. if this condition persists for more that 600 m s, the fault timer will active, discharging c softstart and initiating a softstart cycle. the power supply will operate in a skip cycle or hiccup mode until either the load power or source impedance is reduced. the minimum fault timeout is 200 m s, which limits the useful switching frequency to a minimum of 5.0 khz. start/run comparator a bootstrap startup circuit is included to improve system efficiency when operating from a high input voltage. the output of the start/run comparator controls the state of an external transistor. a typical application is shown in figure 21. while c softstart is charging, startup bias is supplied to v cc (pin 14) from v in through transistor q2. when c softstart reaches the 1.95 v clamp level, the startrun output switches low (v cc = 50 mv), turning off q2. operating bias is now derived from the auxiliary bootstrap winding of the transformer, and all drive power is efficiently converted down from v in . the start time must be long enough for the power supply output to reach regulation. this will ensure that there is sufficient bias voltage at the auxiliary bootstrap winding for sustained operation. t start = 1.95 v c softstart 1.0 m a = 1.95 c softstart in m f the start/run comparator has 350 mv of hysteresis. the output offstate is clamped to v cc + 7.6 v by the internal zener and pnp transistor baseemitter junction. drive output and drive ground the mc34129 contains a single totempole output stage that was specifically designed for direct drive of power mosfets. it is capable of up to 1.0 a peak drive current and has a typical fall time of 30 ns with a 500 pf load. the totempole stage consists of an npn transistor for turnon drive and a high speed scr for turnoff. the scr design requires less average supply current (i cc ) when compared to conventional switching control ics that use an all npn totempole. the scr accomplishes this during turnoff of the mosfet, by utilizing the gate charge as regenerative onbias, whereas the conventional all transistor design requires continuous base current. conversion efficiency in low power applications is greatly enhanced with this reduction of i cc . the scr's lowstate holding current (i h ) is typically 225 m a. an internal 225 k w pulldown resistor is included to shunt the drive output offstate leakage to ground when the undervoltage lockout is active. a separate drive ground is provided to reduce the effects of switching transient noise imposed on the ramp input. this feature becomes particularly useful when the i pk(max) clamp level is reduced. figure 24 shows the proper implementation of the mc34129 with a current sensing power mosfet. undervoltage lockout the undervoltage lockout comparator holds the drive output and c softstart pins in the low state when v cc is less than 3.6 v. this ensures that the mc34129 is fully functional before the output stage is enabled and a softstart cycle begins. a builtin hysteresis of 350 mv prevents erratic output behavior as v cc crosses the comparator threshold voltage. a 14.3 v zener is connected as a shunt regulator from v cc to ground. its purpose is to protect the mosfet gate from excessive drove voltage during system startup. an external 9.1 v zener is required when driving low threshold mosfets. refer to figure 21. the minimum operating voltage range of the ic is 4.2 v to 12 v. references the 1.25 v bandgap reference is trimmed to 2.0% tolerance at t a = 25 c. it is intended to be used in conjunction with the error amp. the 2.50 v reference is derived from the 1.25 v reference by an internal op amp with a fixed gain of 2.0. it has an output tolerance of 5.0% at t a = 25 c and its primary purpose is to supply charging current to the oscillator timing capacitor. for further information, please refer to an976.
mc34129 mc33129 11 motorola analog ic device data figure 20. external duty cycle clamp and multiunit synchronization figure 21. bootstrap startup figure 22. discrete step reduction of clamp level figure 23. adjustable reduction of clamp level the external 9.1 v zener is required when driving low threshold mosfets. c softstart 12 7 6 5 4 2.5v osc r s q 1.25v 13 14 9.1 v 8 9 10 11 1 2 3 q2 v in + + + + + + + i pk(max) = 1.675 (v f(d1) + v f(d2) ) 275mv r s q 1.25v 8 9 10 11 1 2 3 v in q1 r s d1 d2 120 m a + + + r s 275mv r s q 1.25v 8 9 10 11 1 2 3 v in q1 r s r1 r2 + + + if: 1.25 v r1 + r2 1.0 ma then: i pk(max) 1.25 r2 r1 + 1 0.275 r s f = 1.44 (r a + 2r b )c d max = r b 5.0v r a r b 8 6 5 2 c 5.0k 4 r q s mc1455 3 7 6 5 4 2.5v osc to additional mc34129's + 5.0k 5.0k 1 + + r a + 2r b
mc34129 mc33129 12 motorola analog ic device data figure 24. current sensing power mosfet figure 25. current waveform spike suppression figure 26. mosfet parasitic oscillations figure 27. bipolar transistor drive v rs r s ? i pk ? r ds(on) if: sensefet = mtp10n10m r s = 200 then: v rs 0.075 i pk 1.25v 8 9 10 11 1 2 3 v in d sensefet g m k s power ground: to input source return r s 1/4w control circuitry ground: to pin 7 virtually lossless current sensing can be achieved with the implementation of a sensefet power switch. + r dm(on) + r s the addition of the rc filter will eliminate instability caused by the leading edge spike on the current waveform. 1 2 3 v in q1 r c r s 1 2 3 v in q1 r s r g series gate resistor r g will damp any high frequency parasitic oscillations caused by the mosfet input capacitance and any series wiring inductance in the gatesource circuit. the totempole output can furnish negative base current for enhanced transistor turnoff, with the addition of capacitor c1. 1 2 3 v in q1 r s c1 i b + 0 base charge removal t
mc34129 mc33129 13 motorola analog ic device data figure 28. nonisolated 725 mw flyback regulator t1: coilcraft #g6807a primary = 90t #28 awg secondary 5v = 26t #30 aw gap = 0.05 n, for lp of 600 m h core = ferroxcube 813e1873c8 bobbin = ferroxcube e187pcb18 12 0.1 7 24k 470pf 128khz sync 6 5 4 2.5 v osc r s q 1.25v 220k 13 14 1n958a 8 9 10 500pf 11 1 2 3 2.2k 2n5551 1n4148 + 10 36k r2 12k r1 mtp 2n20l 10 50 t1 1n5819 5v/125ma 100 gnd 100 5v/20ma 1n5819 v in = 20v to 48v + + + ++ + + + + test conditions results line regulation 5.0 v v in = 20 v to 40 v, i out 5.0 v = 125 ma, i out 5.0 v = 20 ma d = 1.0 mv load regulation 5.0 v v in = 30 v, i out 5.0 v = 0 ma to 150 ma, i out 5.0 v = 20 ma d = 2.0 mv output ripple 5.0 v v in = 30 v, i out 5.0 v = 125 ma, i out 5.0 v = 20 ma 150 mvpp efficiency v in = 30 v, i out 5.0 v = 125 ma, i out 5.0 v = 20 ma 77% v out = 1.25 r2 r1 + 1
mc34129 mc33129 14 motorola analog ic device data figure 29. isolated 2.0 w flyback regulator t1: primary = 35t #32 awg feedback = 12t #32 awg secondary 5 v = 7t #32 awg gap = 0.004 , for lp of 180 m h core = ferroxcube 813e1873c8 bobbin = ferroxcube e187pcb18 12 0.1 7 24k 470pf 6 5 4 2.5v osc r s q 1.25v 220k 13 14 8 9 10 11 1 2 gnd 5v/20ma v in = 20v to 48v 0.1 2.7k 1 2 6 5 4 10k 128khz sync moc5007 2.2k 2n5551 100 1n5819 180 pf 2 0.1 140k 330 20k t1 1n5819 5v/380ma 100 100 1n5819 mtp 2n20 100pf 100 + + + ++ + + 1n5819 + + + 3 test conditions results line regulation 5.0 v v in = 20 v to 40 v, i out 5.0 v = 380 ma, i out 5.0 v = 20 ma d = 1.0 mv load regulation 5.0 v v in = 30 v, i out 5.0 v = 100 ma to 380 ma, i out 5.0 v = 20 ma d = 15 mv output ripple 5.0 v v in = 30 v, i out 5.0 v = 380 ma, i out 5.0 v = 20 ma 150 mvpp efficiency v in = 30 v, i out 5.0 v = 380 ma, i out 5.0 v = 20 ma 73%
mc34129 mc33129 15 motorola analog ic device data figure 30. isolated 3.0 w flyback regulator with secondary side sensing t1: l1: primary = 22t #18 awg secondary = 22t #18 awg lp = 50 m h core = ferroxcube 2616pa1003c8 bobbin = ferroxcube 2616f1d coilcraft z7156, 15 m h 12 0.1 7 6 5 4 2.5v osc r s q 1.25v 13 14 8 9 10 11 1 2 3 v in = 12v d g m k s 1n5821 l1 5/60ma 470 1/2 4n26 51 100 0.1 return tl431a mtp10n10m 1/2 4n26 + + + ++ 2.2k 15k 510 0.002 + + 3.9k 3.9k 200 0.001 100 test conditions results line regulation v in = 8.0 v to 12 v, i out 600 ma d = 1.0 mv load regulation v in = 12 v, i out = 100 ma to 600 ma d = 8.0 mv output ripple v in = 12 v, i out = 600 ma 20 mvpp efficiency v in = 12 v, i out = 600 ma 81% an economical method of achieving secondary sensing is to combine the tl431a with a 4n26 optocoupler.
mc34129 mc33129 16 motorola analog ic device data outline dimensions p suffix plastic package case 64606 issue l d suffix plastic package case 751a03 (so14) issue f notes: 1. leads within 0.13 (0.005) radius of true position at seating plane at maximum material condition. 2. dimension l to center of leads when formed parallel. 3. dimension b does not include mold flash. 4. rounded corners optional. 17 14 8 b a f hg d k c n l j m seating plane dim min max min max millimeters inches a 0.715 0.770 18.16 19.56 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l 0.300 bsc 7.62 bsc m 0 10 0 10 n 0.015 0.039 0.39 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t t f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019 motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. atypicalo parameters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/affirmative action employer. how to reach us: usa / europe / locations not listed : motorola literature distribution; japan : nippon motorola ltd.; tatsumispdjldc, 6f seibubutsuryucenter, p.o. box 20912; phoenix, arizona 85036. 18004412447 or 6023035454 3142 tatsumi kotoku, tokyo 135, japan. 038135218315 mfax : rmfax0@email.sps.mot.com touchtone 6 022446609 asia / pacific : motorola semiconductors h.k. ltd.; 8b tai ping industrial park, internet : http://designnet.com 51 ting kok r oad, tai po, n.t., hong kong. 85226629298 mc34129/d
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